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dev krishnan
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dev krishnan
Asked: July 28, 2022In:
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I am using CubeSuite environment and ccrl compiler to build software, and in my code I want to disable all interrupts before performing memory write operation and enable all interrupt once the operation is completed. How can I do that, any ...Read more

I am using CubeSuite environment and ccrl compiler to build software, and in my code I want to disable all interrupts before performing memory write operation and enable all interrupt once the operation is completed.

How can I do that, any document or demo code would be of great help?

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ccrlcubesuiterl78
  1. nidhi singh

    Use inline assembly for the EI / DI instructions, or use the intrinsic functions: This is from the help-file "Compiler-CCRL.chm" located in the folder "C:\Program Files (x86)\Renesas Electronics\CS+\CC\CC-RL\Help".

    Use inline assembly for the EI / DI instructions, or use the intrinsic functions:

    This is from the help-file “Compiler-CCRL.chm” located in the folder “C:\Program Files (x86)\Renesas Electronics\CS+\CC\CC-RL\Help”.

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techfreak
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techfreak
Asked: July 7, 2022In:
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For my project I am using dot matrix displays for which I want to store the font data and some images which are pre defined, as code flash memory area, All this display data takes up a lot of RAM, is ...Read more

For my project I am using dot matrix displays for which I want to store the font data and some images which are pre defined, as code flash memory area,

All this display data takes up a lot of RAM, is there any specific library or method to use large arrays as part of program memory.

MCU: R5F100LGAFB

IDE:   CS+ For CC (RL78)

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program memoryrenesasrl78
  1. dev krishnan

    Code-flash would have to be addressed as "far" data memory, I might recommend using the IAR compiler as it handles the "huge" memory qualifier that allows "far" array accesses across 64KB boundaries.  Or you could use CC-RL with a simple assembly routine to handle the "huge" memory references.

    Code-flash would have to be addressed as “far” data memory, I might recommend using the IAR compiler as it handles the “huge” memory qualifier that allows “far” array accesses across 64KB boundaries.  Or you could use CC-RL with a simple assembly routine to handle the “huge” memory references.

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vsharma
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vsharma
Asked: July 4, 2022In:
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What is the major difference between single and continuous transfer mode w.r.t to performance, as in both the cases for every byte ISR is served?

What is the major difference between single and continuous transfer mode w.r.t to performance, as in both the cases for every byte ISR is served?

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bytecontinuous transfer modeg13isrrl78single transfer
  1. pallavi sharma

    According to the RK78/G13 User's Manual, "Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode) can be selected". So in the single mode interrupt is generated after transmission of every byte, and in continuous mode it is generated once the buffer bRead more

    According to the RK78/G13 User’s Manual, “Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode) can be selected“.

    So in the single mode interrupt is generated after transmission of every byte, and in continuous mode it is generated once the buffer becomes empty.

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vikas Nagpal
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vikas Nagpal
Asked: June 28, 2022In:
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I want to configure RX0 and TX0 on pins P16 and P17 for Renesas R5F102AA, is it possible without changing the pin setting on PIOR register?

I want to configure RX0 and TX0 on pins P16 and P17 for Renesas R5F102AA, is it possible without changing the pin setting on PIOR register?

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P16P17PIORrenesasrenesas rl78rl78RL78 [R5F102AA]RX0TX0uartUART Pin
  1. Rutuja

    Do you see the note on page 20 of the Hardware User's Manual? It says clearly that PIOR has to be used to change the function to TxD0/RxD0.

    Do you see the note on page 20 of the Hardware User’s Manual?

    It says clearly that PIOR has to be used to change the function to TxD0/RxD0.

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sravanisandya
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sravanisandya
Asked: February 21, 2022In:
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In Renesas RL78 CS+ IDE while writing to the on-chip debug reserved area is prohibited(address:0x00000002). Showing (E1203124) Error while Flashing from E1 emulator.

In Renesas RL78 CS+ IDE while writing to the on-chip debug reserved area is prohibited(address:0x00000002). Showing (E1203124) Error while Flashing from E1 emulator.

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cs+rl78
  1. subbu

    In Renesas CS+ IDE, Goto Code Generator(Design Tool),On-chip debug setting should be used Now Generate code and Download .

    In Renesas CS+ IDE, Goto Code Generator(Design Tool),On-chip debug setting should be used
    Now Generate code and Download .

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sravanisandya
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sravanisandya
Asked: February 21, 2022In:
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How to Watch Renesas RL78 Data Flash Memory in Watch Window?

How to Watch Renesas RL78 Data Flash Memory in Watch Window?

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cc/cacxcs+rl78
  1. subbu

    In Renesas CS+ IDE , Goto view ->Memory->Memory1 In that DataFlash Address mentioned in Datasheet for Ex.RL78F14, F1000 DataFlash Starting Address

    In Renesas CS+ IDE , Goto view ->Memory->Memory1 In that DataFlash Address mentioned in Datasheet for Ex.RL78F14, F1000 DataFlash Starting Address

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