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Home/qspi

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vikas Nagpal
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vikas Nagpal
Asked: September 2, 2022In: Microcontroller

RA4M3 MCUBoot with external secondary slot in QSPI and coded with ECISE

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I’ve configured MCU Boot in FSP3.8.0 to use external QSPI for the secondary slot which works when not coded. Still, if I enable ECISE encryption in RASC and put an coded image in the secondary slot in QSPI, MCU Boot ...Read more

I’ve configured MCU Boot in FSP3.8.0 to use external QSPI for the secondary slot which works when not coded. Still, if I enable ECISE encryption in RASC and put an coded image in the secondary slot in QSPI, MCU Boot will tell me that both the primary and secondary images aren’t valid. I’m encrypting with the python image tool using the test keys without any error from the tool. Does anyone have any ideas?

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ecisemcumicrocontrollerqspira4m3renesasRenesas Microcontroller
  1. Alex thomas
    Added an answer on September 8, 2022 at 10:15 am

    Hi, What have you got the heap set to in the BSP settings? For ECIES more heap is needed than just ECC and AES along. Try 0x1000 and see if it works( doesn't need to be this large but reduce it once it's working). If you still have problems let me know and I'll put a demo together.

    Hi,

    What have you got the heap set to in the BSP settings? For ECIES more heap is needed than just ECC and AES along. Try 0x1000 and see if it works( doesn’t need to be this large but reduce it once it’s working).
    If you still have problems let me know and I’ll put a demo together.

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techfreak
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techfreak
Asked: June 24, 2022In: Microcontroller

QSPI on Renesas RA6E1

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While setting up the QSPI stack on a RA6E1 (R7FA6E10D2CFP#AA0) to interface to a W25Q40CLUXIG flash memory. I have 2 questions: 1. Do you have an example project of using a 25x QSPI flash memory? 2. What does this option mean, since ...Read more

While setting up the QSPI stack on a RA6E1 (R7FA6E10D2CFP#AA0) to interface to a W25Q40CLUXIG flash memory.
I have 2 questions:

1. Do you have an example project of using a 25x QSPI flash memory?

2. What does this option mean, since QSPI by definition use multiple lines “Support multiple line programming in extended SPI mode”?

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flash memoryqspira6e1renesas
  1. pallavi sharma
    Added an answer on July 29, 2022 at 5:19 pm

    Extended SPI meaning and features refer to: Renesas RA6E1 Group User’s Manual: Hardware: section on Quad Serial Peripheral Interface (QSPI) Table 33.1 QSPI specifications. Also see attached figure. I am not aware of an example project of using a 25x QSPI flash memory for RA6E1. However, I can give sRead more

    Extended SPI meaning and features refer to:
    Renesas RA6E1 Group User’s Manual: Hardware: section on Quad Serial Peripheral Interface (QSPI)
    Table 33.1 QSPI specifications.
    Also see attached figure.

    I am not aware of an example project of using a 25x QSPI flash memory for RA6E1.
    However, I can give some pointers to achieve the result:
    The other evaluation kit for RA4M2 has a project called quickstart_ek_ra4m2_ep included in the FSP example project bundle. Parts of C code demonstartes how Quad-SPI FLASH Write/Read is implemented. User interface is also implemented using USB code.
    You will have to adapt this code to suit your requirements. The flash Write / Read code is in menu_ext.c file

    As JB, RenesasRulz Forum Moderator suggested the QSPI module for FSP included in the qspi_ek_ra6m3g_ep folder has an example for QSPI.
    This Example Project demonstrates the functionality of QSPI module using On board QSPI chip macronix MX25L in QPI and Extended SPI modes. The SPI Protocol is selected from RA configurator.Fixed data is written to QSPI Flash device and read back. Read and Write data is compared and the result is displayed on Jlink RTTViewer.

    Additionally, you may want to look at QSPI (r_qspi) RA Flexible Software Package Documentation:
    https://renesas.github.io/fsp/group___q_s_p_i.html

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