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nidhi singh
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nidhi singh
Asked: January 19, 2023In:
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Hi, We’re seeing a positive pulse in pin 6.5 while powering up, resetting & programming (via SWD). Please see the attached screenshots. The pin is port 6, which also has SWD and reset lines. We tested the pin with various configurations via ...Read more

Hi,

We’re seeing a positive pulse in pin 6.5 while powering up, resetting & programming (via SWD). Please see the attached screenshots.

The pin is port 6, which also has SWD and reset lines. We tested the pin with various configurations via PSoC creator, but could not find out the root cause. Can anyone help us in correcting this issue?

Edit We’re also seeing such an issue in pin 11.1

regards,

Nidhi

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gpioInfineonmcumicrocontrollerspsoc6pulse
  1. Alex thomas

    Hello, By default, all GPIO pins start out at reset as Analog_HiZ. This means the pin though configured at initialization as a draw-down thing inactive low launches life floating until the boot initialization is complete. still, also I suggest an average worth resistor( 100K?) drag-down to GND If thRead more

    Hello,

    By default, all GPIO pins start out at reset as Analog_HiZ. This means the pin though configured at initialization as a draw-down thing inactive low launches life floating until the boot initialization is complete.

    still, also I suggest an average worth resistor( 100K?) drag-down to GND If this is your project case.

    Thank You

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vikas Nagpal
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vikas Nagpal
Asked: November 29, 2022In:
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Hello, I have an R7FA2E1A93CFM microcontroller set as a slave. I use SCI SPI. The miso side of the communication line creates a pointless pulse. Functions that shouldn’t work are triggered because of this signal. You can see it in the ...Read more

Hello,

I have an R7FA2E1A93CFM microcontroller set as a slave. I use SCI SPI. The miso side of the communication line creates a pointless pulse. Functions that shouldn’t work are triggered because of this signal. You can see it in the circle in the picture below. I need your help.

Thank You in Advance…

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mcumicrocontrollermisopulser7fa2e1a93cfmrenesas
  1. nidhi singh

    Hi, The MISO pulses manifest at some stage in SPI idle state (while the clock is idle among the transfers). In master mode (in SPI, now no longer SCI_SPI) there's the choice to pick out MOSI idle level at low or high based on the MOIFE and MOIFV bit settings in SPPCR. However, there's no such choiceRead more

    Hi,

    The MISO pulses manifest at some stage in SPI idle state (while the clock is idle among the transfers).

    In master mode (in SPI, now no longer SCI_SPI) there’s the choice to pick out MOSI idle level at low or high based on the MOIFE and MOIFV bit settings in SPPCR.

    However, there’s no such choice in slave mode to choose the idle level of MISO.

    We could help greater in case you share more information about why those pulses are trouble to your application.

    Regards,

    Nidhi

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