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Hi, I would like to trigger ADC conversion with GPT capture and compares events without using the FSP configuration. I couldn’t figure out how to do it, is there any example project about it? Thank you
Hi,
I would like to trigger ADC conversion with GPT capture and compares events without using the FSP configuration. I couldn’t figure out how to do it, is there any example project about it?
Thank you
Read lessHello, We are changing a product from a Community to an RA processor. Can we use the same E2 Studio and switch between SSP and FSP? We’ll have times when we are doing maintenance on the Community product and also doing ...Read more
Hello,
We are changing a product from a Community to an RA processor. Can we use the same E2 Studio and switch between SSP and FSP? We’ll have times when we are doing maintenance on the Community product and also doing dev on the new RA board.
Is there a specific version of E2 that can do this?
Does it make sense, or should we’ve two different E2 setups?
Thanks
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Hi Alex, The FSP and SSP releases are at a different meter and each version released is tested/ qualified against a specific version of e2-studio. The distribution download of the platform installer will ensure that the proper version of e2-studio will be with the FSP/ SSP version. I advise that youRead more
Hi Alex,
The FSP and SSP releases are at a different meter and each version released is tested/ qualified against a specific version of e2-studio. The distribution download of the platform installer will ensure that the proper version of e2-studio will be with the FSP/ SSP version. I advise that you command a different and specific installation for SSP and FSP.
Thanks & Regards
Nidhi
Hello, I’m trying to import, make and flash some of the example projects included in the archive”ek_ra6m5-exampleprojects.zip” Still, for a good number of these, it seems they’ve not been updated or maintained to keep up with changes in the FSP leading to ...Read more
Hello,
I’m trying to import, make and flash some of the example projects included in the archive”ek_ra6m5-exampleprojects.zip”
Still, for a good number of these, it seems they’ve not been updated or maintained to keep up with changes in the FSP leading to numerous errors and warnings in the Stacks configuration tab on importing the design, numerous of which are flagging up deprecated settings and/ or settings that are needed to be set but aren’t set.
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Hi, As the clock speed is allowed by FSP configuration, it should be safe for all the peripherals. For example, I've tested OSPI with a clock source from MOCO and set it at 8 MHz. Could you share what makes you suppose it isn't working correctly? Regards,
Hi,
As the clock speed is allowed by FSP configuration, it should be safe for all the peripherals. For example, I’ve tested OSPI with a clock source from MOCO and set it at 8 MHz. Could you share what makes you suppose it isn’t working correctly?
Regards,
Dear Volt.Tech, I’ve been trying to run the IIC master example code with the EK- RA6M3 board but it doesn’t make with the latest FSP version(4.0.0). To workaround this I installed v3.8.0 but I’m facing issues with the IDE where it doesn’t enter the function which has a multi-byte i2c read sequence. I’m using the MAX86161 detector to test this out. Thanks & Regards
Dear Volt.Tech,
I’ve been trying to run the IIC master example code with the EK- RA6M3 board but it doesn’t make with the latest FSP version(4.0.0). To workaround this I installed v3.8.0 but I’m facing issues with the IDE where it doesn’t enter the function which has a multi-byte i2c read sequence. I’m using the MAX86161 detector to test this out.
Thanks & Regards
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Hi, Thanks for reaching out to Engineering Community. Could you please check your e² studio version? Please note that FSP versions of 3.7.0 and later require a minimal e² studio version of 2022- 04 and FSP versions of 4.0.0 and later require a minimum e² studio version of 2022- 07. Best regards,
Hi,
Thanks for reaching out to Engineering Community.
Could you please check your e² studio version? Please note that FSP versions of 3.7.0 and later require a minimal e² studio version of 2022- 04 and FSP versions of 4.0.0 and later require a minimum e² studio version of 2022- 07.
Best regards,
See lessI want to work a 1 Hz waveform from the RTCOUT pin( P407). I’ve successfully configured the pin, but can not feel to get an work on P407. Are there certain way that I’ve to follow to get this working?
Assuming that you have enabled the RTCOUT pin in the pin configuration, add this line of code to your project. R_RTC->RCR2_b.RTCOE = 1; For example: void hal_entry(void) { /* TODO: add your own code here */ fsp_err_t err; err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg); if( FSP_SUCCESS != errRead more
Assuming that you have enabled the RTCOUT pin in the pin configuration, add this line of code to your project.
R_RTC->RCR2_b.RTCOE = 1;
For example:
void hal_entry(void)
{
/* TODO: add your own code here */
fsp_err_t err;
err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg);
if( FSP_SUCCESS != err )
{
__BKPT(1);
}
err = R_RTC_CalendarTimeSet(&g_rtc0_ctrl, &sys_time);
if( FSP_SUCCESS != err )
{
__BKPT(1);
}
R_RTC->RCR2_b.RTCOE = 1;
while(1);
}
Would have thought that an API may exist for this, or would be enabled by default when you enable the pin in the pin config.
See lessHow to set the mac address dynamically on a Renesas RA6M2 CPU? I found in the Azure RTOS documents that you must use the following API call, however in the Renesas FSP Documentation it says you must ...Read more
How to set the mac address dynamically on a Renesas RA6M2 CPU?
I found in the Azure RTOS documents that you must use the following API call, however in the Renesas FSP Documentation it says you must not use that and rather it says do this – the application must set ether_cfg_t::p_mac_address prior to initializing the IP instance.
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in the auto generated code ether_cfg_t::p_mac_address points to a non-const global variable :- Set the required MAC address in the global variable before calling nx_ip_create() (or attaching a new interface to an already existing NetX IP instance).
in the auto generated code ether_cfg_t::p_mac_address points to a non-const global variable :-
Set the required MAC address in the global variable before calling nx_ip_create() (or attaching a new interface to an already existing NetX IP instance).
See lessIs there any binary compression solutions in the FSP? Something like BZ2, LZ4, LZMA, Z standard, Heatshrink or CRLE compression?
Is there any binary compression solutions in the FSP? Something like BZ2, LZ4, LZMA, Z standard, Heatshrink or CRLE compression?
Read lessNo - there are not compression APIs included with the FSP. There are many open source compression libraries that you can add to your FSP project.
No – there are not compression APIs included with the FSP. There are many open source compression libraries that you can add to your FSP project.
See lessFor a project (using Renesas R7FA2L1AB2DFL), a bootloader which can update our firmware is needed. We have decided to copy this bootloader in RAM, and execute it from there since otherwise code flash memory cannot be programmed. We plan to ...Read more
For a project (using Renesas R7FA2L1AB2DFL), a bootloader which can update our firmware is needed. We have decided to copy this bootloader in RAM, and execute it from there since otherwise code flash memory cannot be programmed. We plan to access this bootloader by setting a certain random KEY in no init RAM (setting this is triggered by an external command) and then triggering a reset. Upon reset and before jumping into our application, we check for this KEY and whether it is set or not. If it is set, we can copy our bootloader from code flash to RAM, and proceed to flash the memory.
For me, it is still unclear what a good way would be to realize this process. There are a couple of points in particular
The FSP flash driver will run from RAM if code flash programming is enabled in the configuration of the driver, for the parts of the flash driver driver that actually do the programming or erasing.
The FSP flash driver will run from RAM if code flash programming is enabled in the configuration of the driver, for the parts of the flash driver driver that actually do the programming or erasing.
See lessHow to configure CAN interrupt without initializing the Message Box with CAN ID’S in FSP?
How to configure CAN interrupt without initializing the Message Box with CAN ID’S in FSP?
Read lessHow to configure RA2L1 Flash Start address and length.
How to configure RA2L1 Flash Start address and length.
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Hi, I have attached an example project on RA2L1 for your reference done on FSP2.3.0. Please update it to latest version if incase you use this example. You would have to edit the linker script, to change the start address in Code flash of the application, however the file memory_regions.ld is an autRead more
Hi,
I have attached an example project on RA2L1 for your reference done on FSP2.3.0. Please update it to latest version if incase you use this example.
You would have to edit the linker script, to change the start address in Code flash of the application, however the file memory_regions.ld is an auto-generated file so any edits are overwritten. Make a copy of memory_regions.ld and give it a different name, e.g. memory_regions_application.ld.
and change the reference from “memory_regions.ld” to the name of the copy of the file you made, at the top of fsp.ld :-
/*
Linker File for Renesas FSP
*/
INCLUDE memory_regions_application.ld
in the file memory_regions_application.ld change the start address and size of the code flash :-
FLASH_START = 0x00008000;
FLASH_LENGTH = 0x38000;
and then in the debug configuration for the application, in the “Run Commands” at the bottom of the Startup tab set the Program counter, Initial Stack pointer and VTOR register to the moved location :-
set $pc = *0x00008004
set $sp = *0x00008000
set {int}0xE000ED08 = 0x00008000
Hello, It’s easy. see the section, 3 of the manual (RA4M1) To trigger the A/D, write to register ELSR8 (R_ELC. ELSR (8), and the number you write to that register is the event number shown in table 18.3, nearly between 0x57 and 0x96, depending on which timer, which event (and maybe which processor).Read more
Hello,
It’s easy. see the section, 3 of the manual (RA4M1)
To trigger the A/D, write to register ELSR8 (R_ELC. ELSR (8), and the number you write to that register is the event number shown in table 18.3, nearly between 0x57 and 0x96, depending on which timer, which event (and maybe which processor).
First, you have to enable the ELC registers by writing 1 to R_ELC. ELCR and writing to the module stop register.
You also have to inform the A/D by writing 9 to ADSTRGR (see section 35.2.12)
Thank You
Vikas
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